1. Field of the Invention
The present invention generally relates to a semiconductor device and a fabrication method of a semiconductor device, and more specifically, to such a semiconductor device having a trench type element isolation structure and a fabrication method of the same.
2. Description of the Related Art
As element isolation techniques in semiconductor devices, the LOCOS (local oxidation of silicon) method is the most popular element isolation method, in which a thermal oxide film is selectively formed at an element isolation region. However, in the LOCOS method, when an oxide film is formed, an enlargement of an oxide film region called as a "bird's beak" will occur along a transverse direction. As a result, an element forming region becomes narrower than a designed value of the element forming region. Consequently, it is difficult in practice to isolate such element forming regions, the interval of which is shorter than, or equal to 1 micron.
To solve this problem of the LOCOS method, a trench type element isolation structure has been proposed in which a trench is formed in a semiconductor substrate, and then an oxide film is buried into the formed trench. However, such a trench type element isolation structure has the following problem. That is, when the surface of the insulating film buried into the trench formed in the semiconductor substrate becomes lower than the surface of the semiconductor substrate, and a stepped portion is produced at an edge portion of the trench, electric field concentration may occur at the edge portion, and therefore leakage currents may be increased. Under such a circumstance, the two manufacturing methods described below for the trench type element isolation structures having no such stepped portion have been proposed.
(1) JP-A-7-176604 discloses a trench type element isolation structure capable of rounding the corners of the silicon substrate in the following manner in order to mitigate the electric field concentration occuring at the edge portion of the buried element isolation region, which is caused by the stepped portion between the surface of the buried element isolation region and the surface of the silicon substrate. That is, after the first oxide film formed on the silicon substrate is side-etched, the third oxide film is formed by thermal oxidation method, which is employed to remove the defect and the like produced in the silicon substrate when the element isolation trench is formed. At this time, the edge portion of the silicon substrate exposed by side-etching the first oxide film is oxidized by way of the thermal oxidation. Also, the volume of the polycrystalline silicon film formed on the first oxide film is expanded by way of the thermal oxidation. As a consequence, the corner of the silicon substrate is rounded. However, even in the trench type element isolation structure, since the corner of the silicon substrate is rounded, there is a problem that the element forming region is narrowed.
(2) JP-A-5-47919 discloses the trench type element isolation structure in which the SiO.sub.2 film buried in the trench groove of the silicon substrate is grown by selective oxidation to form the rounded portion at the edge portion of the element forming region, so that both the bird's beak and the bird's head are formed. However, the trench type element isolation structure is directed to the improvement in the gate withstanding voltage and the leakage current failure in the MOS-type FET, and since both the bird's beak and the bird's head are formed, there is a problem that the element forming region is narrowed.